The present invention relates to a sputtering device used in the manufacture of a semiconductor devices. More particularly, the present invention relates to a collimator used in a sputtering device which provides uniform film growth, fewer density defects, and decreased contamination particles.
Multi-layer wiring is a principal factor for the increased speed, yield, and reliability of current semiconductor devices, and is regarded as perhaps the single most important process in the multiplicity of processes required to manufacture a semiconductor device. However, multi-layer wiring is not without its problems. For example, contact sizes have become extremely small, aspect ratios have increased, and junctions formed on semiconductor substrates have become much thinner, because of recent enhancements to integration techniques and continuing efforts to miniaturize semiconductor devices. Specifically, the contact hole size of the next generation (i.e., DRAMS beyond 64 Mb) semiconductor devices has fallen below 0.5 .mu.m and the aspect ratio of such is now greater than three. Given these design parameters, contact holes must be planarly buried by a metal or insulating layer in order to achieve the desired yield, speed and reliability of the semiconductor device.
As a method for burying contact holes having high aspect ratio, a W (tungsten) plug process has been proposed. Specifically, the W-plug process requires a titanium (Ti) or titanium-nitride (TiN) layer formed by a sputtering method as an adhesion layer or barrier layer in a lower portion. However, Ti or TiN layers have poor step coverage when applied via a sputtering method. Thus, a W-plug cannot be completely buried in contact holes having high aspect ratio and small size. Accordingly, shorts and reliability problems occur in a W-plug type metal layer.
More recently, a sputtering method employing a collimator when forming a Ti or TiN layer has been proposed in order to solve the above problems. The collimator used for the sputtering is intended to improve the uniformity of the grown film by means of directing the sputtered Ti or TiN. See "Sputtering Process Integration: PVD and Metal Annealing," Proceedings of the 2nd International Symposium on ISSP '93, p127-133). The conventional collimator is explained with reference to FIG. 1 and FIG. 2. FIG. 1 is a perspective view of a single pillar cell of the conventional collimator. The term "pillar cell," as used herein, is intended to describe a hollow three-dimensional structure having outer, defining "side walls" and a corresponding open central area aligned along the intended flow direction of sputtered material. FIG. 2 is a view illustrating one side wall of the pillar cell shown in FIG. 1.
Referring to FIG. 1 and FIG. 2, each pillar within the conventional collimator is shaped as a hexagon. Sputtered Ti or TiN passes from an upper portion 1 through the pillar cell to a lower portion 2. Reference numerals 4 and 5 of FIG. 1 denote the vertical component of movement for the sputtered Ti or TiN. In the conventional collimator, Ti or TiN typically having a vertical movement component passes through each pillar cell making up the collimator, thereby reducing the degree to which the "passed" Ti or TiN is scattered. As a result, uniformity and step coverage of the Ti or TiN film is improved.
Unfortunately, while Ti or TiN having a vertical movement component passes easily through each pillar cell, Ti or TiN having a horizontal movement component does not pass through each pillar cell. Quite to the contrary, "grains" of Ti or TiN, shown as elements 3 in FIG. 1, having a horizontal movement component adheres to side walls of the pillar cell. Once adhered the grains of Ti or TiN collide with sputtered Ti or TiN in the successive vacuum deposition processes and generate unwanted heat on side walls of each cell.
The following table shows the thermal expansion coefficient and thermal conductivity with respect to each material used for the conventional collimator.
______________________________________ linear thermal thermal material expansion coefficient conductivity ______________________________________ aluminum 25.0 .times. 10.sup.6 /.degree.C. 2.37 watts/cm .degree.C. titanium 8.5 .times. 10.sup.6 /.degree.C. 0.2 watts/cm .degree.C. tungsten 4.5 .times. 10.sup.6 /.degree.C. 1.78 watts/cm .degree.C. silicon 3.0 .times. 10.sup.6 /.degree.C. 0.835 watts/cm .degree.C. stainless 9.6 microns/inch .degree.F. 0.08 kcal/sec cm .degree.C. steel ______________________________________
As can be seen in the above table, thermal stress is generated by the difference between the heat transfer phase and heat expansion coefficient of the material used to construct the collimator and the sputtered material. This thermal stress ultimately causes adhering grains of Ti or TiN to "drop off" the side walls of the collimator in an uncontrolled fashion.
FIG. 2 shows a smooth side wall surface 6 of the conventional pillar cell shown in FIG. 1. Since side wall surface 6 of the conventional collimator is smooth and slippery, adhering grains of Ti or TiN drop off relatively easily. Grains "dropping off" during the deposition process create contamination particles on the surface of the semiconductor device undergoing fabrication.
Accordingly, semiconductor devices manufactured with the conventional collimator suffer from degraded yield and reliability problems due to the presence of process-induced contamination particles on the semiconductor substrate. Furthermore, such particles represent a notable hinderance to the stable operation of the sputtering device.